1. Field of the Invention
The present invention relates to a plasma display panel and a driving method thereof.
2. Description of the Related Art
A plasma display panel includes two glass substrates having electrodes formed thereon, with a gap of about 100 microns therebetween that is filled with a discharge mixture gas containing Ne, Xe, or the like. A voltage that is equal to or greater than the break down voltage (of the discharge gas) is applied between the electrodes to cause a discharge giving a UV radiation, which excites and illuminates phosphors provided on the substrate, thereby displaying an image.
FIG. 7 is a diagram illustrating a general structure of a plasma display panel device.
On a display panel 10, first electrodes (X electrodes) 11 and second electrodes (Y electrodes) 12 are formed so as to be disposed in parallel to each other. Third electrodes (address electrodes) 13 are formed so as to cross perpendicularly to the first and second electrodes. A first driving circuit 14 supplies a voltage pulse to the first electrodes 11, a second driving circuit 15 supplies a voltage pulse to the second electrodes 12, and a third driving circuit 16 supplies a voltage pulse to the third electrodes 13. The first and second electrodes 11 and 12, are provided to initiate a sustain discharge for display illumination. The sustain discharge occurs when the voltage pulse is applied repeatedly between the first and second electrodes 11 and 12. In addition, one of the first and second electrodes 11 and 12 functions as a scan electrode (Y electrode) for writing display data. The third electrode 13, on the other hand, is a electrode for selecting a display cell to be illuminated, and applies to a selected cell a voltage for initiating a writing discharge between the third electrode 13 and one of the first electrode 11 and second electrode 12. The first, second and third driving circuits 14, 15 and 16 are for generating voltage pulse relative to purposes of the first, second and third electrodes 11, 12 and 13.
FIG. 8 is a plan view illustrating a display panel portion of the device shown in FIG. 7. The X electrode as the first electrode and the Y electrode as the second electrode are disposed parallel to each other. In this figure, electrodes for display lines L1 to L5 are shown. Moreover, the address electrode as the third electrode (A1 to A4) and ribs 2 for dividing discharge cells are formed. The panel 10 has the X electrode and the Y electrode as display electrodes alternatively disposed at a constant interval so as to use all gaps between electrodes as display lines (L1, L2 . . . ). Such method is called ALIS method (Alternate Lighting of Surfaces) and disclosed in Japanese Patent No. 2801893. Because all of the gaps between electrodes are used as the display line, a number of electrodes can be a half of that in a plasma display panel having a structure as shown in FIG. 14. Therefore, it is an advantageous method in terms of cost reduction and higher definition.
FIG. 9 is a diagram illustrating a luminescence principle of a plasma display panel using the ALIS method. In the ALIS method, two display lines share one electrode, and thus, an upper line and a lower line sharing a common electrode cannot be illuminated at the same time. Therefore, similar to an interlaced display in a TV receiver, a display of odd-numbered lines (a first field) and a display of even-numbered lines (a second field) are done alternatively in a time-division manner.
FIG. 10 is a diagram illustrating a structure of sub-fields in a driving method of a plasma display panel using the ALIS method. As shown in the figure, one frame is composed of a first and a second fields dividing inside thereof. Moreover, each field is divided by a plurality of sub-fields. The plasma display panel is either discharged or not-discharged. Therefore, difference in brightness, i.e., gradation, is controlled by a number of discharges. For the above-mentioned reason, the frame includes a plurality of sub-fields each corresponding to a different number of discharges. Thus, by selectively discharging the sub-field to be illuminated according to the gradation, different brightness can be achieved. Generally, 8 to 12 sub-fields are provided.
Furthermore, each sub-field includes a reset period 21, an address period 22, and a sustain discharge period 23 (also called as a sustain period). The reset period 21 conducts an operation to reset all the cells in a uniform state, e.g., a state in which wall charge is eliminated, regardless of an illumination state of the previous sub-field. In order to decide ON/OFF state of the cell according to display data, the address period 22 selectively discharges (i.e., initiate an address discharge) to form the wall charge to put the cell in ON state. The sustain discharge period 23 emits predetermined light by repeating discharges in the cell in which the address discharge has occurred.
FIGS. 11A to 11E illustrate waveform diagrams of driving waveforms each being applied to each electrode in a plasma display panel employing the ALIS method. FIG. 11A shows a pulse supplied to the address electrode; FIG. 11B shows a pulse supplied to an X1 electrode; FIG. 11C shows a pulse supplied to a Y1 electrode; FIG. 11D shows a pulse supplied to an X2 electrode; and FIG. 11E shows a pulse supplied to a Y2 electrode. First, during the reset period, in order to eliminate an excessive wall charge of a cell that has been illuminated in the previous sub-field, a fine pulse xe2x88x92Vy of 1 xcexcs and about xe2x88x92170V is applied to the Y electrode. With the pulse xe2x88x92Vy, excessive wall charges between the address electrode and the Y electrode are eliminated. Next, a pulse of about xe2x88x92120V (xe2x88x92Vwx) having a gentle gradient waveform is applied to the X electrode. With the pulse xe2x88x92Vwx, the wall charge is eliminated between the address electrode and the X electrode and between X and Y electrodes of the cell that has been illuminated in the previous sub-field and. Then, a writing pulse (Vw) of about 170V having a gentle gradient waveform is applied to the Y electrode. With the pulse Vw, a writing discharge occurs between the Y electrode and the address electrode, and between the Y electrode and the X electrode to form a certain degree of wall charge. In addition, while a voltage of about 90V (Vx) is applied to the X electrode, an elimination pulse (xe2x88x92Vey) of about xe2x88x92160V having a gentle gradient waveform is applied to the Y electrode. Thus, the wall charge formed the instant preceding thereof is eliminated, and some new wall charges having a reversed polarity are formed. Through all operations described above, all the cells become electrically uniform to be prepared for a next address period. The wall charge of the last phase of the reset period is such that a few positive charges are formed in the Y electrode and a few negative charges are formed in the X electrode. It should be understood that in the figure, Va represents an address pulse, xe2x88x92Vy represents a scan pulse, and Vs represents a sustain pulse.
According to the ALIS method, in odd-numbered fields, lines are illuminated between the X1-Y1 electrodes, X2-Y2 electrodes, X3-Y3 electrodes and so on. In the even-numbered fields, lines are illuminated between Y1-X2 electrodes, Y2-X3 electrodes, Y3-X4 electrodes and so on. Consequently, during the address period, the address pulse is applied to the address electrode, whereas in the address period of the odd-numbered field the scan pulse is applied to Y1, Y2 . . . Yn electrodes. During the address period, in the even-numbered field, the scan pulse is applied to the X2, X3 . . . Xn electrodes. During the sustain discharge period in the odd-numbered field, the sustain pulse is applied to X1-Y1 electrodes, X2-Y2 electrodes, X3-Y3 electrodes, and so on, so that an addressed cell is illuminated. During the sustain discharge period in the even-numbered field, the sustain pulse is applied to Y1-X2 electrodes, Y2-X3 electrodes, Y3-X4 electrodes and so on, so that an addressed cell is illuminated.
FIGS. 12A to 12F show waveform diagrams of voltages applied to a plasma display panel during the sustain discharge period. FIG. 12A is a waveform diagram of a voltage applied to the X1 electrode; FIG. 12B is a waveform diagram of a voltage applied to the Y1 electrode; FIG. 12C is a waveform diagram of a voltage applied to the X2 electrode; FIG. 12D is a waveform diagram of a voltage applied to the Y2 electrode; FIG. 12E is a waveform diagram of a voltage applied to the X3 electrode; and FIG. 12F is a waveform diagram of a voltage applied to the Y3 electrode. Black dots represent discharge positions of a discharge by a display line defined by the X2 electrode and the Y2 electrode. In this case, in order to prevent generation of a discharge between the Y1 and X2 electrodes and between the Y2 and X3 electrodes, each electrode is applied with a wide pulse.
FIG. 14 is a diagram illustrating a general configuration of other plasma display panel in general. An X electrode and a Y electrode are paired up to form one display line.
FIGS. 15A to 15C show driving waveforms for driving a plasma display panel shown in FIG. 14, in which, FIG. 15A shows a waveform applied to the address electrode; FIG. 15B shows a waveform applied to the X electrode; and FIG. 15C shows a waveform applied to the Y electrode. The driving waveform is based on the disclosure of Japanese Patent No. 2692692 but with a modification to the reset period waveform, and is disclosed in Japanese Translation of Unexamined PCT Application from other countries No. 2000-501199. The driving method is characterized in that during the reset period, a wall charge superimposed by an address pulse remains between the address electrode and the Y electrode. Therefore, it is possible to lower voltage of the address pulse and a scan pulse applied during the address period.
FIGS. 13A to 13D are diagrams illustrating operation of a plasma display panel using the ALIS method as shown in FIGS. 8 to 12F. FIG. 13A shows a state in which a sustain discharge is repeatedly initiated between the X2 electrode and the Y2 electrode. During that time, as shown in FIG. 13B, electrons generated by the sustain discharge are accumulated as a wall charge as it moves toward adjacent the Y1 electrode or the X3 electrode. Electrons have greater mobility than ions, and thus diffusion toward adjacent cells is easy to occur. On the other hand, ions have less mobility so that accumulation in the adjacent cell does not occur. The amount of charge to be stored increases as the interval between electrodes decrease, as the applied voltage increases, and as the number of times sustain discharge is repeated increases. When the amount of accumulation exceeds certain point, a discharge is initiated between the X1 and Y1 electrodes as shown in FIG. 13C, and thereafter, the sustain discharge occurs repeatedly by the sustain discharge pulse as shown in FIG. 13D.
Moreover, even if the wall charge does not remain during the reset period, an abnormal discharge may occur when the interval between electrodes are narrow, the applied voltages high, and a number of the repetition of the sustain discharge large.
Furthermore, similar phenomenon occurs in the plasma display panel shown in FIGS. 14 and 15C.
FIGS. 16A to 16C show diagrams illustrating operation of the plasma display panel as shown in FIGS. 14 and 15A to 15C. FIG. 16A shows a state of a wall charge after the reset period and before entering the address period. As previously shown, the wall charge, that is advantageous for an address discharge, remains. FIG. 16B shows a state in which the address discharge is initiated in a cell of the X2 electrode and the Y2 electrode. FIG. 16C shows a state during the sustain discharge period. It shows that the cell between the X1 electrode and the Y1 electrode starts the discharge because of a priming effect or the like of illuminating cells by repeating the sustain discharges. The wall charge formed during the reset period in the present method is advantageous for the address discharge, but may be affect disadvantageously for the sustain discharge period. Particularly, the phenomenon tends to occur in a high definition panel having small intervals between electrodes, and in a case where driving is performed while a large amount of wall charges remain during the reset period.
An object of the present invention is to solve the above-described problems, and to provide a plasma display panel and a driving method thereof which prevents an abnormal discharge from generating in a cell in which an address discharge is not occurred, the cell adjacent to a cell in which the address discharge is conducted and a sustain discharge is initiated.
According to the present invention, a reset discharge is conducted before an address period to eliminate a wall charge or to make a predetermined amount of wall charge remain therein. After the address discharge is selectively conducted during the address period, a discharge is initiated in a cell in which the address discharge does not occur so as to adjust an amount or a polarity of the wall charge.
Moreover, according to the present invention, in reset step before the address period, negative charges are formed in an X electrode and a Y electrode, thus avoiding an abnormal discharge.
The present invention will be described in detail below.
According to a first aspect, in a driving method of a plasma display panel, the plasma display panel includes a plurality of first electrodes, a plurality of second electrodes disposed alternately and parallel to the first electrode, and a plurality of third electrodes disposed perpendicularly to the first and the second electrodes so as to provide intervals. The method includes: a step for resetting; a step for address discharging; a step for sustain discharging; and a charge adjustment step for adjusting a wall charge for a cell having no address discharges occurred therein by applying a voltage for initiating a discharge between the third electrode and one of the first and the second electrodes in the cell having no address discharges occurred therein during either one of a period for the reset step, a period for the address step, and a period for the sustain discharge step. In addition, a small amount of negative charges are accumulated in a vicinity of the first and the second electrodes in the cell having no address discharges occurred therein.
According to a second aspect, in a driving method of a plasma display panel, the plasma display panel includes a plurality of first electrodes, a plurality of second electrodes disposed alternately and parallel to the first electrode, and a plurality of third electrodes disposed perpendicularly to the first and the second electrodes so as to provide intervals. The method includes: a reset step; an address discharge step; and a sustain discharge step; wherein a charge adjustment step is provided for adjusting a wall charge for a cell having no address discharges occurred therein by applying a voltage for initiating a discharge between the third electrode and one of the first and the second electrodes in the cell having no address discharges occurred therein.
In the second aspect, the sustain discharge is occurred one time in a cell in which the address discharge is initiated in the address step, and the charge adjustment step is initiated thereafter.
In the second aspect, the charge adjustment step applies a voltage to initiate a discharge in the cell in which the address discharge does not occur caused by the use of the third electrode as a cathode and either one of the first and the second electrodes as an anode. Moreover, in the charge adjustment step, another one of first and second electrodes has a voltage that does not initiate a discharge between the address electrode and the one of the first and the second electrodes.
In the second aspect, in the charge adjustment step, a polarity between the first and the second electrodes is a reversed polarity of a waveform that initiates a discharge between the first and the second electrode at the end of the reset step.
In the second aspect, the charge adjustment step is provided in at least one of a plurality of sub-fields within a field or a frame. Alternatively, the charge adjustment step is provided in a sub-field having a large number of times of sustain discharge. Another alternative is that the charge adjustment step is provided in the first sub-field in the field.
In the second aspect, the voltage for initiating the discharge between the third electrode and the one of the first and second electrodes in the charge adjustment step has a voltage waveform having gentle gradient. Moreover, electrons are formed on both the first and the second electrode in the charge adjustment step.
In a third aspect, in a driving method of a plasma display panel, the plasma display panel comprises a plurality of first electrodes, a plurality of second electrodes disposed alternately and parallel to the first electrode, and a plurality of third electrodes disposed perpendicularly to the first and the second electrodes so as to provide intervals. The method includes: a reset step; an address discharge step; a sustain discharge step; wherein, a charge adjustment step is provided in the reset step so that electrons remain both of the first electrode side and the second electrode side.
In a fourth aspect, a plasma display panel includes: a plurality of first electrodes, a plurality of second electrodes disposed alternately and parallel to the first electrode, and a plurality of third electrodes disposed perpendicularly to the first and the second electrodes so as to provide intervals. A driving circuit is provided to conduct a reset step, an address discharge step, and a charge adjustment step and a sustain discharge step for adjusting a wall charge with respect to a cell, in which the address discharge is not conducted, by applying a voltage which initiates s discharge between the third electrode and one of the first electrode and the second electrode.
In a fifth aspect, the plasma display panel includes: a plurality of first electrodes, a plurality of second electrodes disposed alternately and parallel to the first electrode, and a plurality of third electrodes disposed perpendicularly to the first and the second electrodes so as to provide intervals. A driving circuit is provided for driving a reset and charge adjustment step for making electrons remain in both of the first electrodes and the second electrodes, an address discharge step, and a sustain discharge step.
These and other objects, features and advantages of the invention will be apparent from the following more particular description of preferred embodiments of the invention, as illustrated in the accompanying drawings.